
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
IN to GND or GND
to V
NEG)
6.8V
SDN, SDP, CE
(GND 0.3V) to
(V
IN + 0.3V)
V
05 Continuous Output Current
80mA
V
05 Short-Circuit Duration to GND
Indefinite
Continuous Power Dissipation (T
A =
600mW
T
150C
θ
140C/W
Operating Ambient Temp. Range
40C to 85C
Operating Junction Temp. Range
40C to 125C
Storage Temp. Range
65C to 150C
Lead Temp. (Soldering, 10 sec.)
300C
2kV
Electrical Characteristics
Limits with standard typeface apply for T
J = 25C, and limits in boldface type apply over the full temperature range. Unless
otherwise specified V
IN = 3.6V, C1 =C2 =C3 =C5 = 2.2F. C4 = 4.7F (Note 5) Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
+
Supply Voltage
2.85
6.5
V
I
Q
Supply Current
No Load
800
1600
A
No Load, V
IN = 6.5V
300
600
I
SD
Shutdown Supply Current
V
IN = 6.5V
6
30
A
V
SD
Shutdown Pin Input Voltage for
CE, SDP, SDN
Logic Input High @ 6.5V
2.4
V
Logic Input Low @ 6.5V
0.8
I
L (+5V)
Output Current at V
05
2.85V < V
IN < 6.5V
50
mA
R
O (5V)
Output Resistance at V
NEG
I
20
40
F
SW
Switch Frequency
85
130
180
kHz
P
EFF
Average Power Efficiency at V
05
2.85V
≤ V
IN
≤ 6.5V
I
L = 25mA to GND
82
%
V
05
Output Regulation
1mA < I
L < 50mA, VIN = 6.5V
4.848
5.05
5.252
V
1mA < I
L < 50mA, VIN = 6.5V
4.797
5.05
5.303
G
LINE
Line Regulation
2.85V < V
IN < 3.6V
0.25
%/V
3.6V < V
IN < 6.5V
0.05
G
LOAD
Load Regulation
1mA < I
L < 50mA, VIN = 6.5V
0.3
1.0
%
R
SW
Series Switch Resistance V
NEG to
V
NSW
V
IN > 2.85V
1.5
V
05 to VPSW
5.0
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: V05 may be shorted to GND without damage. However, shorting VNEG to V05 may damage the device and must be avoided. Also, for temperature above
85C, V05 must not be shorted to GND or device may be damaged.
Note 3: The maximum allowable power dissipation is calculated by using PDMAX =(TJMAX —TA)/θJA, where TJMAX is the maximum junction temperature, TA is the
ambient temperature and
θJA is the junction-to-ambient thermal resistance of the specified package.
Note 4: The human body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin.
Note 5: In the typical operating circuit, capacitors C1 and C2 are 2.2F, 0.3 maximum ESR capacitors. Capacitors with higher ESR will increase output resistance,
reduce output voltage and efficiency.
Note 6: Specified output resistance includes internal switch resistance and ESR of capacitors. See the Detailed Device Description section.
Note 7: The 50 mA maximum current assumes no current is drawn from VDBL pin. See Voltage Doubler section in the Detailed Device Description.
LM2685
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